An Analysis of Fault-Tolerant Dual-Core Lockstep Architectures and Soft Error Mitigation Strategies in High-Reliability Semiconductor Systems. Emerging Indexing of Global Multidisciplinary Journal, [S. l.], v. 3, n. 10, p. 12–17, 2024. Disponível em: https://grpublishing.net/index.php/eigmj/article/view/122.. Acesso em: 29 apr. 2026.